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Automotive qualified products (AEC-Q100/Q101)

BUK9M16-100L

BUK9M16-100L

N-channel 100 V, 16 mOhm logic level MOSFET in LFPAK33

12 December 2024

1. General description

Logic level N-channel MOSFET in an LFPAK33 (Power33) package using TrenchMOS technology. This product has been designed and qualified to AEC-Q101 standard for use in high performance automotive applications.

2. Features and benefits

  • Logic-level compatible

  • Trench12 MOSFET technology

  • Efficient switching with soft body-diode recovery

  • Automotive qualified to AEC-Q101 at 175 °C

  • Side-wettable flanks for robust solder joints and automatic optical inspection

3. Applications

  • 12 V, 24 V and 48 V automotive systems

  • Motors, lamps and solenoid control

  • Transmission control

  • LED lighting

  • Circuit protection

4. Quick reference data

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VDS

drain-source voltage

25 °C ≤  Tj ≤  175 °C

-

-

100

V

ID

drain current

VGS = 10 V; Tmb = 25 °C; Figure 2

1

-

-

45

A

Ptot

total power dissipation

Tmb = 25 °C; Figure 1

-

-

90.9

W

Static characteristics

RDSon

drain-source on-state resistance

VGS = 10 V; ID = 15 A; Tj = 25 °C; Figure 6

8.4

12

15.3

Dynamic characteristics

QGD

gate-drain charge

ID = 15 A; VDS = 50 V; VGS = 5 V; Tj = 25 °C; Figure 8; Figure 9

1.5

4.9

11

nC

Source-drain diode

Qr

recovered charge

IS = 25 A; dIS/dt = -100 A/µs; VGS = 0 V; VDS = 50 V; Tj = 25 °C; Figure 12

-

43

-

nC

5. Pinning information

Pin

Symbol

Description

Simplified outline

Graphic symbol

1

S

source



LFPAK33 (SOT1210)

2

S

source

3

S

source

4

G

gate

mb

D

Mounting base; connected to drain

6. Ordering information

Type number

Package

Name

Description

Version

BUK9M16-100L

LFPAK33

Plastic, single ended surface mounted package (LFPAK33); 8 leads; 0.65 mm pitch

SOT1210

7. Marking

Type number

Marking code

BUK9M16-100L

9161HL

8. Limiting values

Symbol Parameter Conditions Min Typ Max Unit
The drain-source voltage rating is the voltage that a MOSFET can safely sustain between its drain and source in an OFF-state.
VDS
drain-source voltage
Tj ≥ 25 °C;
Tj ≤ 175 °C
100 V
The gate-source voltage rating of the MOSFET refering to the maximum voltage that can be applied across gate-source.
VGS
gate-source voltage
0
-20 20 V
The total power dissipation capability given against temperature range between mounting base temperature and the max junction temperature.
Ptot
total power dissipation
-55 °C
175 °C
90.9 W
The drain-source current refers to the maximum continuous current through the MOSFET channel in an ON-state.
ID
drain current
VGS < 10 V;
-55 °C
175 °C
0
51 A
The pulsed drain current for which max value is given at 10us.
IDM
peak drain current
0;
tp ≤ 10 µs;
Tmb = 25 °C
203 A
The storage temperature is the temperature range in which the device can be stored without affecting its reliability.
Tstg
storage temperature -55 175 °C
The junction temperature of the device refers to the capability of the silicon die of the MOSFET. Junction temperature is given as a range of operational temperatures of the MOSFET.
Tj
junction temperature -55 175 °C
Source-drain diode
The source-drain current is the maximum continous current though the MOSFET body diode (with the MOSFET in OFF-state)
IS
source current
Tmb = 25 °C
45 A
The pulse current through the body diode of the MOSFET.
ISM
peak source current
0;
tp ≤ 10 µs;
Tmb = 25 °C
203 A
Avalanche ruggedness
The single event Avalanche Energy capability of MOSFET at the conditions given.
EDS(AL)S
non-repetitive drain-source avalanche energy
ID = 22.3 A;
Vsup ≤ 100 V;
RGS = 50 Ω;
VGS = 5 V;
Tj(init) = 25 °C;
0;
0;
0;
0
60.3 mJ
IAS
non-repetitive avalanche current
Vsup = 100 V;
VGS = 5 V;
Tj(init) = 25 °C;
RGS = 50 Ω;
0;
0
22.3 A


P d e r = P t o t P t o t ( 25 ° C ) × 100 %

Figure 1. Normalized total power dissipation as a function of mounting base temperature

ID (A)
Tmb (°C)

VGS ≥ 10 V

(1) 45 A continuous current has been successfully demonstrated during application tests. Practically the current will be limited by PCB, thermal design and operating temperature.

Figure 2. Continuous drain current as a function of mounting base temperature

ID (A)
VDS (V)

Tmb = 25 °C; IDM is a single pulse

Figure 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage

IAL (A)
tAL (ms)

(1) Tj (init) = 25 °C; (2) Tj (init) = 150 °C; (3) Repetitive Avalanche

Figure 4. Avalanche rating; avalanche current as a function of avalanche time

9. Thermal characteristics

Symbol Parameter Conditions Min Typ Max Unit
The thermal resistance between the silicon junction and the MOSFET mounting base. Mounting base is sometimes referred to as case in other datasheets.
Rth(j-mb)
thermal resistance from junction to mounting base 1.5 1.65 K/W
Zth(j-mb)(K/W)
tp (s)

Figure 1. Transient thermal impedance from junction to mounting base as a function of pulse duration

10. Characteristics

Symbol Parameter Conditions Min Typ Max Unit
Static characteristics
The minimum voltage the device is guaranteed to block between the drain and source terminals in the OFF-state.
V(BR)DSS
drain-source breakdown voltage
ID = 250 µA;
VGS = 0 V;
-55 °C
175 °C
118 V
The gate-source threshold voltage needed for MOSFETs to conduct a certain drain-current at a specific junction temperature. It is temperature dependent and at higher temperatures the threshold value is lower.
VGS(th)
gate-source threshold voltage
ID = 0.12 mA;
0;
-55 °C
175 °C
1.62 V
The drain-source leakage current when the MOSFET is in OFF-state. It is temperature dependent and gets higher at higher temperatures.
IDSS
drain leakage current
5 V
100 V
VGS = 0 V;
-55 °C
175 °C
0.08 µA
The gate-source leakage current normally in nA range. It is temperature dependent and gets higher at higher temperatures.
IGSS
gate leakage current
VGS = 20 V;
VDS = 0 V;
Tj = 25 °C
2 100 nA
The resistance of the device in the on-state under the conditions described. Drain-source on resistance varies greatly with both junction temperature and the gate-source voltage (VGS).
RDSon
drain-source on-state resistance
1.5 V
15 V
1 A
45 A
-55 °C
175 °C
10.5
RG
gate resistance
f = 1 MHz;
Tj = 25 °C
0.75 1.5 3 Ω
Dynamic characteristics
The total gate charge of the MOSFET. Covering the full switching transition showing turn-on threshold, linear mode, and fully enhanced stages.
QG(tot)
total gate charge
1 A
45 A
5 V
95 V
0 V
15 V
Tj = 25 °C
22.2 nC
The gate-source charge parameter is a part of the switching transition. It is normally used to determine turn-on time.
QGS
gate-source charge
1 A
45 A
5 V
95 V
VGS = 5 V;
Tj = 25 °C
7.26 nC
The gate-drain charge is a part of the switching transition. It is responsible for how long the switching transition is held at plateu region.
QGD
gate-drain charge
1 A
45 A
5 V
95 V
VGS = 5 V;
Tj = 25 °C
6.99 nC
VGS(pl)
gate-source plateau voltage
ID = 15 A;
VDS = 50 V;
Tj = 25 °C
2.9 V
The capacitance between the gate and the other two terminals (source and drain). The parameter is voltage dependent.
Ciss
input capacitance
0 V
95 V
VGS = 0 V;
f = 1 MHz;
Tj = 25 °C
2845 pF
The capacitance between the drain and the other two terminals (gate and source). The parameter is voltage dependent.
Coss
output capacitance
0 V
95 V
VGS = 0 V;
f = 1 MHz;
Tj = 25 °C
692 pF
The capacitance between the drain and the gate. The parameter is voltage dependent.
Crss
reverse transfer capacitance
0 V
95 V
VGS = 0 V;
f = 1 MHz;
Tj = 25 °C
48.7 pF
td(on)
turn-on delay time
VDS = 50 V;
RL = 3.2 Ω;
VGS = 5 V;
RG(ext) = 5 Ω;
Tj = 25 °C
12.7 ns
tr
rise time
VDS = 50 V;
RL = 3.2 Ω;
VGS = 5 V;
RG(ext) = 5 Ω;
Tj = 25 °C
13.1 ns
td(off)
turn-off delay time
VDS = 50 V;
RL = 3.2 Ω;
VGS = 5 V;
RG(ext) = 5 Ω;
Tj = 25 °C
27.1 ns
tf
fall time
VDS = 50 V;
RL = 3.2 Ω;
VGS = 5 V;
RG(ext) = 5 Ω;
Tj = 25 °C
28.4 ns
Source-drain diode
The forward voltage of the MOSFET body diode under the conditions described.
VSD
source-drain voltage
5 A
203 A
VGS = 0 V;
-55 °C
175 °C
0.89 V
The time taken to recover the charge from the anti-parallel diode when it is switched from its conducting state to its reverse biased (diode) state. Reverse recovery time is related to switching performance.
trr
reverse recovery time
IS = 25 A;
dIS/dt = -100 A/µs;
VGS = 0 V;
VDS = 50 V;
Tj = 25 °C
50 ns
The total amount of charge recovered from the anti-parallel diode when it is switched from its conducting state to its reverse biased (diode) state. Reverse recovery charge is related to switching performance.
Qr
recovered charge
5 A
45 A
-1200 A/µs
-100 A/µs
VGS = 0 V;
VDS = 50 V;
Tj = 25 °C
1.93 nC
ID (A)
VDS (V)

Tj = 25 °C

Figure 1. Output characteristics; drain current as a function of drain-source voltage; typical values

Rdson (mΩ)
VGS (V)

Tj = 25 °C; ID = 25 A

Figure 2. Drain-source on-state resistance as a function of gate-source voltage; typical values

ID (A)
VGS (V)

VDS = V

Figure 3. Transfer characteristics; drain current as a function of gate-source voltage; typical values

ID (A)
VGS (V)

Tj = 25 °C; VDS = 5 V

Figure 4. Sub-threshold drain current as a function of gate-source voltage

VGS(th) (V)
Tj (°C)

ID = 0.12 mA ; VDS = VGS

Figure 5. Gate-source threshold voltage as a function of junction temperature

Rdson (mΩ)
ID (A)

Tj = 25 °C

Figure 6. Drain-source on-state resistance as a function of drain current; typical values

a
Tmb (°C)
a = R D S o n R D S o n   ( 25 ° C )

Figure 7. Normalized drain-source on-state resistance factor as a function of junction temperature

VGS (V)
QG (nC)

Tj = 25 °C; ID = 25 A

Figure 8. Gate-source voltage as a function of gate charge; typical values



Figure 9. Gate charge waveform definitions

C (pF)
VDS (V)

VGS = 0 V; f = 1 MHz

Figure 10. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values

IS (A)
VSD (V)

VGS = 0 V

Figure 11. Source-drain (diode forward) current as a function of source-drain (diode forward) voltage; typical values



Figure 12. Reverse recovery timing definition

11. Package outline

Figure 1. Package outline LFPAK33 (SOT1210)

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