Block diagram
Highlighted components are Nexperia focus products
Products
Design considerations
- Potential for high capacitive bus load, handling FM+ speed (1 MHz)
- I2C master and slaves operating from 0.8 V to 5 V
- Need to split or separate I2C branches
- Support for clock-stretching
Logic Application Handbook
Download Nexperia’s Logic Design Engineer’s Guide and get a better understanding of Logic products, their features and properties, timing and interfacing aspects as well as get an overview of application insights.
Selection Guide 2022
The 2022 edition of the Nexperia Selection Guide presents all our Discrete, Logic and MOSFET devices in one single document to give you a complete overview of our portfolio, making it easier for you to find the right product for your design.