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74LVC1G18

1-of-2 non-inverting demultiplexer with 3-state deselected output

The 74LVC1G18 is a 1-to-2 demultiplexer with 3-state outputs. The device buffers the data on input A and passes it to output 1Y or 2Y, depending on whether the state of the select input (S) is LOW or HIGH. The unused output assumes the high impedence OFF-state. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Features and benefits

  • Wide supply voltage range from 1.65 V to 5.5 V

  • Overvoltage tolerant inputs to 5.5 V

  • High noise immunity

  • ±24 mA output drive (VCC = 3.0 V)

  • CMOS low power dissipation

  • Latch-up performance exceeds 250 mA

  • Direct interface with TTL levels

  • IOFF circuitry provides partial Power-down mode operation

  • Complies with JEDEC standard:

    • JESD8-7 (1.65 V to 1.95 V)

    • JESD8-5 (2.3 V to 2.7 V)

    • JESD8C (2.7 V to 3.6 V)

    • JESD36 (4.5 V to 5.5 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Specified from -40 to +85 °C and -40 to +125 °C.

Parametrics

Type number VCC (V) Logic switching levels Output drive capability (mA) tpd (ns) Power dissipation considerations Tamb (°C) Package name
74LVC1G18GV 1.65 - 5.5 CMOS/LVTTL ± 32 2.3 low -40~125 TSOP6
74LVC1G18GW 1.65 - 5.5 CMOS/LVTTL ± 32 2.3 low -40~125 TSSOP6

Package

Type number Orderable part number, (Ordering code (12NC)) Status Marking Package Package information Reflow-/Wave soldering Packing
74LVC1G18GV 74LVC1G18GV,125
(935273782125)
Active V18 SOT457
TSOP6
(SOT457)
SOT457 REFLOW_BG-BD-1
WAVE_BG-BD-1
SOT457_125
74LVC1G18GW 74LVC1G18GW,125
(935273781125)
Active VW SOT363-2
TSSOP6
(SOT363-2)
SOT363-2 SOT363-2_125

Environmental information

Type number Orderable part number Chemical content RoHS RHF-indicator
74LVC1G18GV 74LVC1G18GV,125 74LVC1G18GV rohs rhf rhf
74LVC1G18GW 74LVC1G18GW,125 74LVC1G18GW rohs rhf rhf
Quality and reliability disclaimer

Documentation (16)

File name Title Type Date
74LVC1G18 1-of-2 non-inverting demultiplexer with 3-state deselected output Data sheet 2023-08-16
AN10161 PicoGate Logic footprints Application note 2002-10-29
AN11009 Pin FMEA for LVC family Application note 2019-01-09
mnb088 Block diagram: 74AUP1G18GF, 74AUP1G18GM, 74AUP1G18GW, 74LVC1G18GV, 74LVC1G18GW Block diagram 2009-11-03
Nexperia_document_guide_MiniLogic_PicoGate_201901 PicoGate leaded logic portfolio guide Brochure 2019-01-07
SOT457 3D model for products with SOT457 package Design support 2022-11-04
SOT363-2 3D model for products with SOT363-2 package Design support 2023-02-02
lvc1g18 74LVC1G18 IBIS model IBIS model 2014-10-20
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
TSOP6_SOT457_mk plastic, surface-mounted package (TSOP6); 6 leads; 0.95 mm pitch; 2.9 mm x 1.5 mm x 1 mm body Marcom graphics 2017-01-28
SOT457 plastic, surface-mounted package (SC-74; TSOP6); 6 leads Package information 2023-03-03
SOT363-2 plastic thin shrink small outline package; 6 leads; body width 1.25 mm Package information 2022-11-21
REFLOW_BG-BD-1 Reflow soldering profile Reflow soldering 2021-04-06
Nexperia_Selection_guide_2023 Nexperia Selection Guide 2023 Selection guide 2023-05-10
MAR_SOT457 MAR_SOT457 Topmark Top marking 2013-06-03
WAVE_BG-BD-1 Wave soldering profile Wave soldering 2021-09-08

Support

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Models

File name Title Type Date
SOT457 3D model for products with SOT457 package Design support 2022-11-04
SOT363-2 3D model for products with SOT363-2 package Design support 2023-02-02
lvc1g18 74LVC1G18 IBIS model IBIS model 2014-10-20

Ordering, pricing & availability

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