74AUP1T98-Q100
Parametrics
Type number | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Nr of bits | Power dissipation considerations | Tamb (°C) | Package name |
---|---|---|---|---|---|---|---|---|---|
74AUP1T98GW-Q100 | 2.3 - 3.6 | CMOS | ± 1.9 | 3.9 | 70 | 1 | ultra low | -40~125 | TSSOP6 |
Package
Type number | Orderable part number, (Ordering code (12NC)) | Status | Marking | Package | Package information | Reflow-/Wave soldering | Packing |
---|---|---|---|---|---|---|---|
74AUP1T98GW-Q100 | 74AUP1T98GW-Q100H (935303992125) |
Active | aR |
TSSOP6 (SOT363-2) |
SOT363-2 | SOT363-2_125 |
Environmental information
Type number | Orderable part number | Chemical content | RoHS | RHF-indicator |
---|---|---|---|---|
74AUP1T98GW-Q100 | 74AUP1T98GW-Q100H | 74AUP1T98GW-Q100 |
Documentation (7)
File name | Title | Type | Date |
---|---|---|---|
74AUP1T98_Q100 | Low-power configurable gate with voltage-level translator | Data sheet | 2023-07-17 |
AN10161 | PicoGate Logic footprints | Application note | 2002-10-29 |
SOT363-2 | 3D model for products with SOT363-2 package | Design support | 2023-02-02 |
aup1t98 | aup1t98 IBIS model | IBIS model | 2014-12-21 |
Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904 | Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904 | Leaflet | 2019-04-12 |
SOT363-2 | plastic thin shrink small outline package; 6 leads; body width 1.25 mm | Package information | 2022-11-21 |
Nexperia_Selection_guide_2023 | Nexperia Selection Guide 2023 | Selection guide | 2023-05-10 |
Support
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Ordering, pricing & availability
Sample
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