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Click here for more information74LVC2G240GF
Dual inverting buffer/line driver; 3-state
The 74LVC2G240 is a dual inverting buffer/line driver with 3-state outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH level at pins nOE causes the outputs to assume a high-impedance OFF-state. Schmitt trigger action at all inputs makes the circuit highly tolerant of slower input rise and fall times.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of the 74LVC2G240 as a translator in a mixed 3.3 V and 5 V environment.
It is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down.
Alternatives
Features and benefits
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant input/output for interfacing with 5 V logic
High noise immunity
±24 mA output drive (VCC = 3.0 V)
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Inputs accept voltages up to 5 V
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8-B/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C
PCB Symbol, Footprint and 3D Model
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Package
All type numbers in the table below are discontinued.
| Type number | Orderable part number, (Ordering code (12NC)) | Status | Marking | Package | Package information | Reflow-/Wave soldering | Packing |
|---|---|---|---|---|---|---|---|
| 74LVC2G240GF | 74LVC2G240GF,115 (935291505115) |
Obsolete | no package information | ||||
Environmental information
All type numbers in the table below are discontinued.
| Type number | Orderable part number | Chemical content | RoHS | RHF-indicator |
|---|---|---|---|---|
| 74LVC2G240GF | 74LVC2G240GF,115 | 74LVC2G240GF |
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Series
Documentation (3)
| File name | Title | Type | Date |
|---|---|---|---|
| 74LVC2G240 | Dual inverting buffer/line driver; 3-state | Data sheet | 2024-04-30 |
| AN11009 | Pin FMEA for LVC family | Application note | 2019-01-09 |
| lvc2g240 | 74LVC2G240 IBIS model | IBIS model | 2014-10-20 |
Support
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Models
| File name | Title | Type | Date |
|---|---|---|---|
| lvc2g240 | 74LVC2G240 IBIS model | IBIS model | 2014-10-20 |
PCB Symbol, Footprint and 3D Model
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