74AUP2G04-Q100
Parametrics
| Type number | VCC (V) | Logic switching levels | Output drive capability (mA) | fmax (MHz) | Nr of bits | Power dissipation considerations | Tamb (°C) | Package name |
|---|---|---|---|---|---|---|---|---|
| 74AUP2G04GW-Q100 | 0.8 - 3.6 | CMOS | ± 1.9 | 70 | 2 | ultra low | -40~125 | TSSOP6 |
Package
| Type number | Orderable part number, (Ordering code (12NC)) | Status | Marking | Package | Package information | Reflow-/Wave soldering | Packing |
|---|---|---|---|---|---|---|---|
| 74AUP2G04GW-Q100 | 74AUP2G04GW-Q100H (935307306125) |
Active | p4 |
TSSOP6 (SOT363-2) |
SOT363-2 | SOT363-2_125 |
Environmental information
| Type number | Orderable part number | Chemical content | RoHS | RHF-indicator |
|---|---|---|---|---|
| 74AUP2G04GW-Q100 | 74AUP2G04GW-Q100H | 74AUP2G04GW-Q100 |
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Documentation (8)
| File name | Title | Type | Date |
|---|---|---|---|
| 74AUP2G04_Q100 | Low-power dual inverter | Data sheet | 2023-07-19 |
| AN10161 | PicoGate Logic footprints | Application note | 2002-10-29 |
| AN11052 | Pin FMEA for AUP family | Application note | 2019-01-09 |
| SOT363-2 | 3D model for products with SOT363-2 package | Design support | 2023-02-02 |
| aup2g04 | aup2g04 IBIS model | IBIS model | 2015-09-06 |
| Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904 | Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904 | Leaflet | 2019-04-12 |
| SOT363-2 | plastic thin shrink small outline package; 6 leads; body width 1.25 mm | Package information | 2022-11-21 |
| Nexperia_Selection_guide_2023 | Nexperia Selection Guide 2023 | Selection guide | 2023-05-10 |
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Ordering, pricing & availability
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