Bipolar transistors

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Analog & Logic ICs

Automotive qualified products (AEC-Q100/Q101)

74LVC374A-Q100

Octal D-type flip-flop; 5 V tolerant inputs/outputs; positive-edge trigger; 3-state

The 74LVC374A-Q100 is an octal positive-edge triggered D-type flip-flop with 3-state outputs. The device features a clock (CP) and output enable (OE) inputs. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

Features and benefits

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

  • Wide supply voltage range from 1.2 V to 3.6 V

  • Overvoltage tolerant inputs to 5.5 V

  • CMOS low power dissipation

  • Direct interface with TTL levels

  • IOFF circuitry provides partial Power-down mode operation

  • 8-bit positive edge-triggered register

  • Independent register and 3-state buffer operation

  • Complies with JEDEC standard:

    • JESD8-7A (1.65 V to 1.95 V)

    • JESD8-5A (2.3 V to 2.7 V)

    • JESD8-C/JESD36 (2.7 V to 3.6 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints

Parametrics

Type number VCC (V) Logic switching levels Output drive capability (mA) tpd (ns) fmax (MHz) Power dissipation considerations Tamb (°C) Package name
74LVC374ABQ-Q100 1.2 - 3.6 CMOS/LVTTL ± 24 2.7 100 low -40~125 DHVQFN20
74LVC374AD-Q100 1.2 - 3.6 CMOS/LVTTL ± 24 2.7 100 low -40~125 SO20
74LVC374APW-Q100 1.2 - 3.6 CMOS/LVTTL ± 24 2.7 100 low -40~125 TSSOP20

Package

Type number Orderable part number, (Ordering code (12NC)) Status Marking Package Package information Reflow-/Wave soldering Packing
74LVC374ABQ-Q100 74LVC374ABQ-Q100X
(935299315115)
Active LVC374A SOT764-1
DHVQFN20
(SOT764-1)
SOT764-1 SOT764-1_115
74LVC374AD-Q100 74LVC374AD-Q100J
(935299316118)
Active 74LVC374AD SOT163-1
SO20
(SOT163-1)
SOT163-1 WAVE_BG-BD-1
SOT163-1_118
74LVC374APW-Q100 74LVC374APW-Q100J
(935299317118)
Active LVC374A SOT360-1
TSSOP20
(SOT360-1)
SOT360-1 SSOP-TSSOP-VSO-WAVE
SOT360-1_118

Environmental information

Type number Orderable part number Chemical content RoHS RHF-indicator
74LVC374ABQ-Q100 74LVC374ABQ-Q100X 74LVC374ABQ-Q100 rohs rhf rhf
74LVC374AD-Q100 74LVC374AD-Q100J 74LVC374AD-Q100 rohs rhf rhf
74LVC374APW-Q100 74LVC374APW-Q100J 74LVC374APW-Q100 rohs rhf rhf
Quality and reliability disclaimer

Documentation (17)

File name Title Type Date
74LVC374A_Q100 Octal D-type flip-flop; 5 V tolerant inputs/outputs; positive-edge trigger; 3-state Data sheet 2023-09-01
AN11009 Pin FMEA for LVC family Application note 2019-01-09
AN263 Power considerations when using CMOS and BiCMOS logic devices Application note 2023-02-07
SOT764-1 3D model for products with SOT764-1 package Design support 2019-10-03
SOT163-1 3D model for products with SOT163-1 package Design support 2020-01-22
SOT360-1 3D model for products with SOT360-1 package Design support 2020-01-22
lvc374a lvc374a IBIS model IBIS model 2013-04-09
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
DHVQFN20_SOT764-1_mk plastic, dual in-line compatible thermal enhanced very thin quad flat package; 20 terminals; 0.5 mm pitch; 2.5 mm x 4.5 mm x 0.85 mm body Marcom graphics 2017-01-28
TSSOP20_SOT360-1_mk plastic, thin shrink small outline package; 20 leads; 0.65 mm pitch; 6.5 mm x 4.4 mm x 1.1 mm body Marcom graphics 2017-01-28
SOT764-1 plastic, leadless dual in-line compatible thermal enhanced very thin quad flat package; 20 terminals; 0.5 mm pitch; 4.5 mm x 2.5 mm x 1 mm body Package information 2022-06-21
SOT163-1 plastic, small outline package; 20 leads; 1.27 mm pitch; 12.8 mm x 7.5 mm x 2.65 mm body Package information 2022-06-20
SOT360-1 plastic, thin shrink small outline package; 20 leads; 0.65 mm pitch; 6.5 mm x 4.4 mm x 1.1 mm body Package information 2022-06-21
lvc lvc Spice model SPICE model 2013-05-07
Nexperia_Selection_guide_2023 Nexperia Selection Guide 2023 Selection guide 2023-05-10
WAVE_BG-BD-1 Wave soldering profile Wave soldering 2021-09-08
SSOP-TSSOP-VSO-WAVE Footprint for wave soldering Wave soldering 2009-10-08

Support

If you are in need of design/technical support, let us know and fill in the answer form we'll get back to you shortly.

Models

File name Title Type Date
SOT764-1 3D model for products with SOT764-1 package Design support 2019-10-03
SOT163-1 3D model for products with SOT163-1 package Design support 2020-01-22
SOT360-1 3D model for products with SOT360-1 package Design support 2020-01-22
lvc374a lvc374a IBIS model IBIS model 2013-04-09
lvc lvc Spice model SPICE model 2013-05-07

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